Electronic design automation (EDA) tools are often used to generate a detailed design of a semiconductor circuit. Computer-implemented tools such as computer-aided design (CAD) tools are often used to carry out the design flow. Many of the operations may be implemented as software running on computer servers and/or workstations.
A typical digital design flow may involve generating a system specification that provides design parameters for the semiconductor circuit to one or more of the EDA tools. A circuit implementing the system specification may then be generated manually or automatically (such as by using ready-made IP functions). The circuit may be entered by a hardware description language (such as Verilog, VHDL, or any other hardware description language (HDL)), or by other means. In a logic synthesis operation, an abstract form of desired circuit behavior (typically a register transfer level (RTL) description or behavioral description) is turned into a design implementation in terms of logic gates. In a verification operation, the netlist output by the logic synthesis operation is verified for functionality against the circuit design specification. A physical implementation of the netlist may then be performed, including an analysis to verify functionality, timing and performance across predetermined or user-specified ranges of process, voltage, and temperature parameters.
Digital blocks implemented in an integrated circuit generally employ multiple remote clock sources that are based on a global clock source. The remote clock sources may, due to propagation delays, process, voltage, temperature and/or other factors, exhibit timing skew with respect to the global clock source. Timing skew between clock sources in an integrated circuit design may result in nonoptimal power and area results for the chip.
Conventionally, IC design flows provide for a worst-case skew analysis that involves manual adjustments of clock phases. The overall process is complicated, costly, and inefficient. Accordingly, what is needed are methods, systems and associated apparatus that allow for the manufacture of integrated circuits in a less complicated, cheaper, and more efficient manner.